1. Field of the Invention
The present invention relates generally to a switching regulator, and is directed more particularly to a switching regulator which can supply a stable DC voltage without the efficiency being lowered and regardless of large load variation.
2. Description of the Prior Art
In the art there has been proposed a switching regulator which can supply a stable DC voltage without the efficiency being lowered and regardless of large load variation. An example of such a prior art switching regulator will be described with reference to FIG. 1, which is disclosed in my copending U.S. Ser. No. 760,457, and which is assigned to the same assignee as the present invention. In the prior art switching regulator shown in FIG. 1, a power source plug 1, which is arranged to be connected from a commercial AC voltage, through power source switches 2 to a rectifier circuit 3 which rectifies the applied AC voltage to a DC voltage. The DC voltage from the rectifier circuit 3 is applied through a primary winding 4a of a transformer 4, which has a magnetic core, and a diode 5 for blocking a reverse current to an NPN transistor 6 which serves as a first switching element. The DC voltage appearing at a mid tap of the primary winding 4a is applied to an NPN transistor 7 which serves as a second switching element. In this case, the inductance value of the primary winding 4a between one end and the mid tap thereof is taken as L.sub.1 and that between the mid tap and the other end of the primary winding 4a is taken as L.sub.2, respectively.
At a secondary winding 4b of the transformer 4 there appears an AC voltage, which is then fed to a rectifier circuit 8 to be rectified and smoothed as a DC voltage. This DC voltage is delivered to an output terminal 9. The DC voltage delivered to the output terminal 9 is applied to a voltage detecting circuit 10 which then detects the value of the applied DC voltage. The detected output is then fed through a coupler 11 such as a photo-coupler or the like for insulating-separation to a pulse width modulator 12, which will produce a switching signal, as a modulating input. While, the pulse width modulator 12 is supplied with a clock pulse from a clock pulse oscillator 13 as a carrier. Thus, the switching signal obtained at the output side of the pulse width modulator 12 has a pulse width which is changed so as to make the DC voltage obtained at the output terminal 9 stable to be of a desired constant value.
In the example of FIG. 1, between the secondary winding 4b of the transformer 4 and the ground, there is connected a resistor 14 of small resistance value for detecting a current, and the voltage drop across the resistor 14 is applied to a current detecting circuit 15. When the voltage drop across the resistor 14, i.e., output current from the output terminal 9 is lower than a predetermined value I.sub.TH, the output side of the current detecting circuit 15 becomes a low level "0", but becomes a high level "1" when the output current is higher than the predetermined value I.sub.TH. This detected output from the current detecting circuit 15 is applied through a coupler 16 such as a photo-coupler or the like for insulating-separation to a memory circuit such as a D-type flip-flop circuit 17 at its D-input terminal which is also supplied at its trigger input terminal T with the clock pulse from the clock pulse oscillator 13. The output at a Q-output terminal of the D-type flip-flop circuit 17 is applied as a gate signal to one input terminal of an AND circuit 18 which is also supplied at its other input terminal with the switching signal from the pulse width modulator 12. The switching signal passed through the AND circuit 18 is fed to the base of the transistor 6. While, the output at a Q-output terminal of the D-type flip-flop circuit 17 is applied as a gate signal to one input terminal of an AND circuit 19 which is also supplied at its other input terminal with the switching signal from the pulse width modulator 12. The switching signal passed through the AND circuit 19 is fed to the base of the transistor 7.
With the prior art switching regulator having the construction described above and shown in FIG. 1, when a load (not shown) connected to the output terminal 9 is low, the output current at the output terminal 9 is reduced. However, when the output current at the output terminal 9 is lower than the predetermined value or threshold level I.sub.TH of the current detecting circuit 15, its detected output becomes "0". As a result, the output at the Q-output terminal of the D-type flip-flop circuit 17 becomes "0" in synchronism with the clock pulse from the clock pulse oscillator 13 so that the transistor 7 turns OFF.
At this time, however, since the output at the Q-output terminal of the flip-flop circuit 17 becomes "1", the switching signal from the pulse width modulator 12 is applied through the AND circuit 18 to the base of the transistor 6. Therefore, the input DC voltage is switched by the transistor 6, and hence an output DC voltage V.sub.O is delivered to the output terminal 9. In this case, since an input DC voltage V.sub.i from the rectifier circuit 3 is applied to all of the primary winding 4a of the transformer 4, i.e., series connection of the inductances L.sub.1 and L.sub.2, and if it is assumed that the duty ratio of the switching signal is taken as D, the period thereof is taken as T.sub.P and the resistance value of the load is taken as R.sub.L, respectively, the output DC voltage V.sub.O is expressed as follows: ##EQU1##
When the maximum output electric power is taken as P.sub.O, it is expressed as follows: ##EQU2##
Accordingly, with the above prior art switching regulator, if the inductance values L.sub.1 and L.sub.2 are previously selected suitably, a sufficiently stable DC voltage V.sub.O for the load variation can be obtained even when the load is low. When the load is rather high, the output current at the output terminal 9 becomes great. When the output current at the output terminal 9 exceeds the threshold level I.sub.TH of the current detecting circuit 15, its detecting output becomes "1". Therefore, the output at the Q-output terminal of the flip-flop circuit 17 becomes "0" in synchronism with the clock pulse from the clock pulse oscillator 13, and hence the output from the AND circuit 18 becomes "0". As a result, the transistor 6 turns OFF. However, at this time the output at the Q-output terminal of the flip-flop circuit 17 becomes "1" so that the switching signal from the pulse width modulator 12 is fed through the AND circuit 19 to the base of the transistor 7 to operate the same. Thus, at this time, the primary winding 4a of the transformer 4 from its one end to its mid tap is used so that the inductance value of this case is only L.sub.1. Therefore, the maximum output electric power V.sub.O of this case is expressed as follows: EQU P.sub.O =V.sub.i.sup.2.D.sup.2.T.sub.P /2L.sub.1 ( 2)
In this case, since the inductance value becomes small as compared with a low load, the maximum output electric power P.sub.O obtained at the output terminal 9 becomes great as apparent from the equations (1) and (2). That is, even when a large output is derived, the DC voltage at the output terminal 9 is stable which is also sufficiently stable for load variation even when the load is high. Further, in this case since the inductance value is changed to (L.sub.1 +L.sub.2) or L.sub.1 in response to the load variation, the efficiency is not lowered any. In this case, the transistor 6 or 7 is switched by the switching signal obtained at the output side of the pulse width modulator 12, so that a desired constant DC voltage can be produced at the output terminal 9.
With the above prior art switching regulator, however, in order to detect load variation, the current at the secondary side of the transformer 4 is detected, so that the coupler 16 such as a photo-coupler or the like is necessary so as to insulate the primary side of the transformer 4 from its secondary side and also the resistor 14 for current detection, current detecting circuit 15 are necessary. Therefore, the above prior art switching regulator is complicated in circuit construction and accordingly expensive.